[WIP] APU Tests

src/CMakeLists.txt

@@ -5,7 +5,7 @@ set(SOURCES
         gameBoy.cpp
         mmap.cpp
         graphics.cpp
-        sound.cpp
+        audio.cpp
 
         # -------
         # Header Files
@@ -14,7 +14,7 @@ set(SOURCES
         mmap.h
         types.h
         graphics.h
-        sound.h
+        audio.h
         )
 
 target_sources(${PROJECT_NAME} PRIVATE ${SOURCES})

src/gameBoy.cpp

@@ -37,14 +37,18 @@ GBE::GBE()
 	// Don't change ordering of gbe_graphics and gbe_sound
 	gbe_graphics->init();
 
-	gbe_sound->init();
+	// gbe_sound->init();
 
 	// Open the Boot ROM
 	if ((bootROM = fopen("../src/dmg_boot.gb", "rb")) == NULL)
 		printf("boot rom file not opened");
 
+//	 // Open the Game ROM
+//	 if ((gameROM = fopen("../tests/pacman.gb", "rb")) == NULL)
+//	 	printf("game rom file not opened");
+
 	// Open the Game ROM
-	if ((gameROM = fopen("../tests/dmg_sound/rom_singles/01-registers.gb", "rb")) == NULL)
+	if ((gameROM = fopen("../tests/dmg_sound/rom_singles/02-len ctr.gb", "rb")) == NULL)
 		printf("game rom file not opened");
 
 	// Set the Boot ROM
@@ -129,7 +133,7 @@ void GBE::update()
 		// this runs at a freq of around 27 * freq(DIV) = 442368 Hz
 		// this is probably enough to implement APU
 		gbe_sound->stepAPU(s_Cycles);
-		gbe_sound->test(s_Cycles);
+//		gbe_sound->test(s_Cycles);
 		s_Cycles = 0;
 		s_Cycles += gbe_cpu->performInterrupt();
 		// printf("s_Cycles after: %d\n\n", s_Cycles);
@@ -150,5 +154,7 @@ void GBE::executeBootROM()
 		s_Cycles += gbe_cpu->performInterrupt();
 	}
 
+//	printf("Value of NR52 after BootROM: %x\n", gbe_mMap->readMemory(0xFF26));
+
 	gbe_mMap->unloadBootRom();
 }

src/mmap.cpp

@@ -44,8 +44,8 @@ MemoryMap::MemoryMap()
 	highRam = new Byte[0x007F];
 	memset(highRam, 0x00, 0x007F);
 
-	waveRam = new Byte[0x0010];
-	memset(waveRam, 0x00, 0x0010 );
+	channelEnable = new bool[0x004];
+	memset(channelEnable, 0x00, 0x04);
 
 	// 1 byte Interrupt Enable Register
 	interruptEnableRegister = new Byte;
@@ -130,6 +130,9 @@ MemoryMap::MemoryMap()
 	ramBankNumberMaskForRom = 0;
 
 	ramBankNumberMaskForRam = 0;
+
+	enableAPU = 0;
+	triggerAPU = 0;
 }
 
 // Write to memory
@@ -227,42 +230,49 @@ bool MemoryMap::writeMemory(Word address, Byte value)
 		{
 			readInput(value);
 		}
-
-		// Write to Audio Registers
-		else if (address >= 0xFF10 && address <=0xFF26){
-			// NR52
-			// only 7th bit is read/write
-			// others are read only
-			if (address == 0xFF26 ){
-				printf("value: %x\n NR52 before: %x\n", value, *(audioReg+NR52));
-				value = value >> 7;
-				*(audioReg + NR52) = (*(audioReg + NR52) & 0b0111111) | (value << 7);
-				printf("NR52 after: %x\n", *(ioPorts+0x10+NR52));
-				printf("NR52 after: %x\n\n", *(audioReg+NR52));
-				enableAPU = value;
-
+		// NR52 Master Audio
+		else if(address == 0xFF26)
+		{
+			int audio_control_bit = value >> 7;
+			enableAPU = audio_control_bit;
+			ioPorts[address - 0xFF00] = (audio_control_bit << 7) | 0x70 | (ioPorts[address - 0xFF00] & 0x0F);
+			if (!enableAPU) {
+				clear_APU_Registers();
+				return true;
 			}
-
-			if(enableAPU){
-				// ioPorts
-				// NR20 && NR40
-				// if( address == 0xFF15 || address == 0xFF1F)
-			}else {
-				for( int i= NR10; i <= NR52 ; i++ ){
-					*(audioReg+i) = 0x00;
+		}
+		else
+		{
+			if(address >= 0xFF10 && address <= 0xFF26){
+				if(!enableAPU) return true;
+				if(address == 0xFF14){
+					printf("NR14\n");
+					printf("value|bit7: %d\n",value & BIT7);
+					printf("value: %x\n", value);
+				}
+				if(address == 0xFF23){
+					printf("NR44\n");
+					printf("value|bit7: %d\n",value & BIT7);
+					printf("value: %x\n", value);
+				}
+				if(address == 0xFF19){
+					printf("NR24\n");
+					printf("value|bit7: %d\n",value & BIT7);
+					printf("value: %x\n", value);
 				}
+				if(address == 0xFF1E){
+					printf("NR34\n");
+					printf("value|bit7: %d\n",value & BIT7);
+					printf("value: %x\n", value);
+				}
+				ioPorts[address - 0xFF00] = value | default_Audio_Values[address - 0xFF10];
 			}
-		}
-
-		// Write to Wave 
-		else if (address >= 0xFF30 && address <= 0xFF3F){
-			if(enableAPU){
-
+			else
+			{
+				ioPorts[address - 0xFF00] = value;
 			}
 		}
 
-		else
-			ioPorts[address - 0xFF00] = value;
 	}
 	else if (address < 0xFFFF)
 	{
@@ -333,6 +343,11 @@ Byte MemoryMap::readMemory(Word address)
 	}
 	else if (address < 0xFF80)
 	{
+		// Return 0xFF for these addresses
+		if(address >= 0xFF27 && address < 0xFF30){
+			return 0xFF;
+		}
+
 		// Read from I/O Ports
 		return ioPorts[address - 0xFF00];
 	}
@@ -512,4 +527,12 @@ void MemoryMap::bankRam()
 	{
 		externalRam = ramBankList[(ramBankNumber & ramBankNumberMaskForRam) & (bankingModeSelect * 0b11)];
 	}
-}
+}
+
+void MemoryMap::clear_APU_Registers()
+{
+	for (int i = 0x00; i <= 0x16 ; ++i)
+	{
+		*(audioReg + i) = default_Audio_Values[i];
+	}
+}

src/mmap.h

@@ -195,14 +195,45 @@ class MemoryMap
 	// APU enable
 	bool enableAPU;
 
+	// APU trigger 
+	// Empty all audio Registers and Wave Ram
+	bool triggerAPU;
+
 	// Audio Registers
 	// NR10 - NR52
 	// FF10 - FF26 
 	Byte* audioReg;
 
-	// FF30–FF3F — Wave pattern RAM
-	// 16 Bytes
-	Byte* waveRam;
+	// Channel Enables
+	bool* channelEnable;
+
+	int default_Audio_Values[0x17] = {
+		0x80, // NR10
+		0x3F, // NR11
+		0x00, // NR12
+		0xFF, // NR13
+		0xBF, // NR14
+		0xFF, // 0x05 FF15 Invalid Register
+		0x3F, // NR21
+		0x00, // NR22
+		0xFF, // NR23
+		0xBF, // NR24
+		0x7F, // NR30
+		0xFF, // NR31
+		0x9F, // NR32
+		0xFF, // NR33
+		0xBF, // NR34
+		0xFF, // 0x15, FF1F Invalid Register
+		0xFF, // NR41
+		0x00, // NR42
+		0x00, // NR43
+		0xBF, // NR44
+		0x00, // NR50
+		0x00, // NR51
+		0x70  // NR52
+	};
+
+	void clear_APU_Registers();
 
 public:
 	Byte* joyPadState;
@@ -344,5 +375,4 @@ class MemoryMap
 
 	Byte getAudioReg(int regId);
 
-	Byte* getWaveRam() { return waveRam; }
 };