Releases: squishy-scsi/hardware
Squishy rev2 connector modules EVT
Caution
This is an EVT (Engineering Validation Test) Version of the hardware, DO NOT use it for production
Squishy rev2 connector modules EVT
This is the finalized set of CAD and CAM files for the EVT/R&D version of Squishy rev2's connector modules. As stated in the warning above, this is not production hardware, it is not recommended to use these files, if you can, please wait for a full proper release.
High Voltage Differential (HVD) Connectors
Low Voltage Differential (LVD) / Single Ended (SE) Connectors
Release Contents
Due to the number of boards in this release, all CAM assets have been archived together, one for each connector board. The contents of each archive are as follows:
<CONNECTOR>.pdf
- Plotted Schematic for the connector board<CONNECTOR>-bom.csv
- Bill of Materials for a single connector board<CONNECTOR>-top-pos.csv
- Pick & Place cendroid files for single connector board<CONNECTOR>-gerbers.zip
- Generated Gerbers and Drill files for a single connector board<CONNECTOR>-panel-top-pos.csv
- Pick & Place cendroid files for connector board panel<CONNECTOR>-panel-gerbers.zip
- Generated Gerbers and Drill files for connector board panel
Squishy rev2 mainboard EVT
Caution
This is an EVT (Engineering Validation Test) Version of the hardware, DO NOT use it for production
Squishy rev2 mainboard EVT
This is the finalized set of CAD and CAM files for the EVT/R&D version of Squishy rev2's mainboard. As stated in the warning above, this is not production hardware, it is not recommended to use these files, if you can, please wait for a full proper release.
The following file sets are provided:
squishy-mainboard-rev2-evt-{top,bottom}-pos.csv
- Pick & Place cendroid files for a single mainboardsquishy-mainboard-rev2-evt-bom.csv
- Bill of Materials for a single mainboardsquishy-mainboard-rev2-evt.zip
- Generated Gerbers and Drill files for a single mainboardsquishy-mainboard-rev2-evt-panel-{top,bottom}-pos.csv
- Pick & Place cendtroid files for a panelsquishy-mainboard-rev2-evt-panel.zip
- Generated Gerbers and Drill files for a panelsquishy-manboard-rev2-evt-schematic.pdf
- Plotted Schematic for the rev2-evt mainboard
Changes (2024-06-20)
- Added missing control signals that were identified when work started on the first PHY board
Changes (2024-10-01)
- Fixed outstanding BOM errata and re-generated PnP and BOM files, gerbers and layout was unchanged
Errata
2024-07-17: Current release has a 48MHz XO specified for the Supervisor, replaced with ASE-32.000MHZ-L-C-T, only BoM needs updatingFixed 2024-10-01- 2024-07-20: Current release has valid pins mixed up to use the supervisor MCU, meaning the FPGA comm channel needs to be bit-banged SPI rather than using the built-in SERCOM peripheral
- 2024-10-10:
Q1
's Source and Drain are swapped (schematic symbol issue) - 2024-10-11:
U16
/U17
/U20
'sBIAS
pin left floating not connected to Vin - 2024-10-11:
SWCLK
andSWDIO
swapped onJ4