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sdram improvements#7

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+52-28

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Commits on Nov 26, 2020

• parameterize CAS value written in MODE REGISTER

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  ad27707

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• parameterize SDRAM_DATA_W in terms of SDRAM_DQM_W

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  6eb4cc4

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• portable verilog; ie: needed in order to build on Xilinx ISE

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