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August 2024 Release

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@yhzhang0128 yhzhang0128 released this 29 Aug 02:42
· 8 commits to main since this release
  1. Support 4 CPU cores on QEMU.

  2. Add a terminal server so that processes on different cores can print concurrently.

  3. Switch to the LiteX+VexRiscv framework on the FPGA boards, which enables

  • page table translation code running on both QEMU and the boards;
  • access to the Ethernet port on the boards, leading to a kernel-bypass networking application;
  • 256MB memory (much larger than before) so that every struct process can hold a message buffer for system call.

Note that support for the Arty S7 board is temporarily suspended. We will add this support back later, but Arty S7 does not have an Ethernet port.