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Controlling Jetson pin states
See https://github.com/OE4T/tegra-demo-distro/discussions/310#discussioncomment-10534547
- Grab the pinmux spreadsheet and configure the pins the way you need then generate the new files https://developer.nvidia.com/downloads/jetson-orin-nx-and-orin-nano-series-pinmux-config-template.
- This will give you three new dtsi files. You need to match up what these are with your machine and meld them to get the changes you need from the machine. The relevant recipe is
tegra-bootfiles
- Build in these recipes
libgpiod libgpiod-tools libgpiod-dev
- Back at the command line run
gpioinfo
and grep on your gpio you want. For my case I wantedGGPIO3_PCC.00
- Take the controller name (0 or 1 for me) and the line and you should now be able to
gpioset -c 1 12=1
to set. where the c is the controller number and 12 is the line number.
There's two ways:
- Through bootloader configuration.
- Through using the virtual /sys filesystem in userspace.
You need to do the following:
- Download an Microsoft Excel sheet(!) containing some macros(!!) and the L4T ("Linux For Tegra") package from Nvidias downloadcenter. Note: For this you need a Nvidia developer account.
- In the Excel sheet, select the desired pin configuration using cell dropdown menus. Use the embedded macro to write out some device tree files.
- Use a Python script which comes with L4T to convert the device tree files into something file the bootloader can understand.
- Embed the bootloader configuration in the Yocto source tree.
As an example, the following guide walks you through reconfiguring pin A9 from it's default state (output GND) to input with weak pull-up.
- The MS Excel part:
- Visit the Nvidia developer download center and search for
Jetson TX2 Series Pinmux
. Here's a direct link for 1.08. Download and run it with macros enabled. - On the second sheet you'll find the configuration for pin
A9
on (at the time of writing) line 246. Cells in columnsAR
andAS
define it as output grounding the signal. Change these cells toInput
andInt PU
. - At the very top of the sheet, click the button labeled
Generate DT file
. Some dialogues will pop up which asks for stuff and have an effect on the filename.
- Visit the Nvidia developer download center and search for
- The Python part:
- Go to the Nvidia developer download center and search for
Jetson Linux Driver Package (L4T)
. Follow the link to theL4T x.y.z Release Page
. (For example, here's the one for R32.4.3.) There, you should find a link labeledL4T Driver Package (BSP)
leading to some tarball named similar toTegra186_Linux_Rx.y.z_aarch64.tbz2
. (Again, as an example here's the one for R32.4.3.). Uncompress it and change toLinux_for_Tegra/kernel/pinmux/t186/
inside. - Run the
pinmux-dts2cfg.py
in the following way:
If it throws errors, it might be related to this.python pinmux-dts2cfg.py \ --pinmux \ addr_info.txt \ gpio_addr_info.txt \ por_val.txt \ --mandatory_pinmux_file mandatory_pinmux.txt \ /path/to/your/excel-created/tegra18x-jetson-tx2-config-template-*-pinmux.dtsi \ /path/to/your/excel-created/tegra18x-jetson-tx2-config-template-*-gpio-*.dtsi \ 1.0 \ > /tmp/new.cfg
- Go to the Nvidia developer download center and search for
- Add a patch in your distro layer reflecting the pin settings in your
/tmp/new.cfg
created above.
You can control/read the pin value from the virtual /sys filesystem but not the pull up/down state.
Software-wise, the GPIOs have other names than on the schematic. Nvidia doesn't make it easy to go from schematic name (like A9
) to the /sys name (like gpio488
). The following user contributed posts explain it better than anything Nvidia has come up with so far:
- https://forums.developer.nvidia.com/t/gpio-doesnt-work/49203/14
- https://forums.developer.nvidia.com/t/gpio-doesnt-work/49203/2
- This post contains the equations in the links above solved for all possible input values.
Having found out the /sys name for your pin, you can take following snippets as an example:
The following snippet sets the gpio to output-low.
# GPIO488 is A9 on the SoM
pin=488
echo $pin > /sys/class/gpio/export
echo out > /sys/class/gpio/gpio$pin/direction
echo 0 > /sys/class/gpio/gpio$pin/value
The following snippet sets the pin to input and reads its logical state:
# GPIO488 is A9 on the SoM
pin=488
echo $pin > /sys/class/gpio/export
echo in > /sys/class/gpio/gpio$pin/direction
cat /sys/class/gpio/gpio$pin/value