How to create executable for core? #1512
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We got the VCS simulation up and we plan to integrate FPGA DDR and PCIE controller. We need a way to create the executable so that we can use the core to configure the DDR and PCIE controller. Any document on how to generate the ram.bin/coremark-2-iteration.bin ? Thanks, |
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For now there is only document written in Chinese: AM can be found here: https://github.com/OpenXiangShan/nexus-am |
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I am using this step to run the gcc make: git clone https://github.com/pz9115/riscv-gcc But I run into unknow CPU given, could you advice what I did wrong? Unknown CPU given in --with-arch=rv64gc_zba_zbb_zbc_zbs. You are currently cherry-picking commit e5ec1231dd0. Untracked files: nothing added to commit but untracked files present (use "git add" to track) |
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For now there is only document written in Chinese:
https://xiangshan-doc.readthedocs.io/zh_CN/latest/tools/gen-workload-with-am/
AM can be found here: https://github.com/OpenXiangShan/nexus-am
For further information, see https://xiangshan-doc.readthedocs.io/zh_CN/latest/tools/xsenv/