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21 Open 31 Closed
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Issues list

Translation of COFFE Power Statistics to System Statistics in VPR
#63 opened Oct 27, 2024 by faaiqgwaqar
1
CB/SB Static Depopulation as FN of L
#62 opened Oct 12, 2024 by faaiqgwaqar
2
Analytical method for FPGA evaluation
#59 opened May 30, 2024 by ketan170102030
About the issue of abnormal power consumption evaluation at low temperatures
#55 opened Oct 26, 2023 by luck-codeer
6
How to compute the "LocalRoutingWireLoad"
#54 opened Sep 18, 2023 by narutozxp
3
About [R, C] in the metal layer
#53 opened Jul 25, 2023 by luck-codeer
5
VPR failed when running with the architecture description file that comes with VTR in COFFE_22nm
#52 opened Jul 25, 2023 by luck-codeer
About the meaning of crit_path_delay
#51 opened Jul 20, 2023 by luck-codeer
1
About the meaning of lut_input, the composition of a tile and how to measure the power consumption of a tile.
#50 opened May 26, 2023 by luck-codeer
2
Question about whether COFFE supports energy_per_toggle in the architecture description file required for VTR
#49 opened May 20, 2023 by jdzhu19
5
Innovs PnR runtime needs express option to reduce QoR and reduce runtime
#47 opened Apr 2, 2023 by StephenMoreOSU
About the minimum supported temperature of COFFE2
#46 opened Mar 28, 2023 by luck-codeer
3
About running COFFE with local optimization instead of global
#40 opened Nov 12, 2022 by yc2367
13
About employing diffusion sharing for multi-input gates like nand2 nor2.
#39 opened Oct 28, 2022 by yc2367
1
About wordlinedriver area calculation in fpga.py
#36 opened Oct 17, 2022 by yc2367
6
vtr arch.xml file does not adapt to at least some non-default COFFE settings
#30 opened Jul 28, 2020 by vaughnbetz
COFFE should check for unsupported LUT sizes in the input files.
#26 opened Jul 8, 2020 by vaughnbetz
RAM block architecture parameters should be echoed back by COFFE
#25 opened Jun 24, 2020 by vaughnbetz
Refactor Finfet support code to reduce duplication and support all features
#23 opened Aug 8, 2019 by vaughnbetz
1
Merge alternative LUT design support into COFFE master
#22 opened Aug 8, 2019 by vaughnbetz
@Ibrahimai
Port transmission gate per circuit element (LUT vs. routing) into COFFE master
#21 opened Aug 8, 2019 by vaughnbetz
@LindaLS
ProTip! Adding no:label will show everything without a label.