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Added a factor of 2 for RAM_wordlinedriver_area in fpga.py, line 5768 since there are 2 wordlines (1 for each port) per BRAM row. #37

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Oct 19, 2022

Added a factor of 2 for RAM_wordlinedriver_area in fpga.py, line 5769

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Added a factor of 2 for RAM_wordlinedriver_area in fpga.py, line 5768 since there are 2 wordlines (1 for each port) per BRAM row. #37

Added a factor of 2 for RAM_wordlinedriver_area in fpga.py, line 5769
b18c535
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