Back to pull request #3949

refactor(frontend): prune the least significant bit of PC #9727

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Run time

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Job	Run time
Changes Detection	4s
EMU - Performance	4h 3m 57s
Generate Verilog	2h 12m 18s
Check Submodules	20s
EMU - CHI	1h 17m 50s
EMU - Basics	5h 40m 28s
EMU - MC	3h 48m 48s
SIMV - Basics	4h 41m 35s
	21h 45m 20s