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Pull requests: OpenXiangShan/XiangShan
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submodule(utility), transforms: collect XSLogs to SimTop.LogPerfEndpoint
#3982
opened Dec 4, 2024 by
klin02
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hartid: dynamically append hartid
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#2672
opened Jan 24, 2024 by
Tang-Haojin
•
Draft
Timing: merge MemBlock timing fixes
timing
Fix bad timing
#2724
opened Feb 28, 2024 by
cz4e
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RAS: handle a case where a jalr instruction requires a pop followed by a push
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#3277
opened Jul 23, 2024 by
my-mayfly
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bpu: ittage table change write priority to read priority.
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#3285
opened Jul 25, 2024 by
sleep-zzz
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bpu: Ittage read during update
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#3367
opened Aug 12, 2024 by
sleep-zzz
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Add OpenLLC in KunminghuV2Config Emu
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#3402
opened Aug 16, 2024 by
Ivyfeather
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L1pf stride
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#2386
opened Oct 13, 2023 by
happy-lx
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refactor: use
Option.when
instead of ifelse or OptionWrapper
#3576
opened Sep 14, 2024 by
Tang-Haojin
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ci(perf): change server list and optimaize the continue
#4074
opened Dec 22, 2024 by
Maxpicca-Li
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power(rob): add clock gate for walkingPtrVec and vstart
#3611
opened Sep 19, 2024 by
xiaofeibao-xjtu
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perf(memblock): opt memset pattern
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#3632
opened Sep 23, 2024 by
happy-lx
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feat(AXI4Memory): add support for WRAP burst mode, and fix a bug
#3726
opened Oct 13, 2024 by
eeeeewwz
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refactor(fpu): remove dependencies on fudian and remove invalid files
#3727
opened Oct 14, 2024 by
HeiHuDie
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Power frontend dyn close sc
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power
about power design or optimization
#3911
opened Nov 21, 2024 by
Lawrence-ID
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style(Backend): modification about FuType object, other style changes
#3532
opened Sep 10, 2024 by
Squareless-XD
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